RE: ARG: PIC A/D conversion jitter
From: Rob Gorbet rbgorbet
uwaterloo.ca
Date: Tue, 25 Apr 2006 20:34:07 -0700
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Hi all. Funny...I'm doing a similar thing right now. Makes me
wonder just how many people are working on projects that read pots
with PICs simultaneously, that we don't hear from! :-)
I am using a 16F876A to read a slider into a 10-bit value, and using
a moving average of 10 samples to get rid of noise. Implemented
using a FIFO, probably quite similar to the way Norm suggested. I
then do an extra bit of filtering by waiting until 20 consecutive
averages are the same before reacting. It was all working nicely.
However. Tonight I moved from my breadboard to a PCB version for
inclusion in the artwork this belongs to. In doing so, I also
moved from a nice benchtop power supply to a wall-wart with a 50'
extension on it. When I put it all together, the system didn't
respond to the slider at all. A little bit of debugging showed
that my ADC readings were jumping by as much as 1% (~10 counts
in 10 bits) even when the ADC wasn't moving, the the average was
never settling for the 20 successive comparisons. The first thing I
checked was Jeff's suggestion of filtering the analog signal with
a 30Hz RC filter. That didn't help at all. Reducing the bandwidth
to a ridiculous 0.1Hz showed that the filter was working (the
reading response time went way down) but once it stabilized the
jitter was still there. I confirmed that the analog input signal
was clean using a scope, so suspected the reference voltage. Sure
enough, it was dirty (~100mV of noise). It took a 10uF filter cap
across Vss and Vdd right on the PIC to clean it up sufficiently,
probably due to the length of wire I was running on the P/S(?)
[code for my average, for the curious:
int16 adc_window[ADC_AVG_WINDOW_SIZE];
int16 * list_start=&adc_window[0];
...
//initialize average array
for (i=0;i<ADC_AVG_WINDOW_SIZE;i++) {
adc_value=READ_ADC();
*(list_start+i)=adc_value;
adc_sum+=adc_value;
}
...
// compute average ADC reading
adc_sum-=*(list_start+list_offset);
adc_sum+=current_adc_reading;
new_average_adc=(int16)(floor(adc_sum/ADC_AVG_WINDOW_SIZE+0.5));
// store current adc value and advance/correct offset
*(list_start+list_offset) = current_adc_reading;
list_offset++;
if (list_offset==ADC_AVG_WINDOW_SIZE) list_offset=0;
There are other ways to do it as well...]
Rob.
> -----Original Message-----
> From: woner-arg-list@xxxxxxxxxxxxxxx
> [mailto:woner-arg-list@xxxxxxxxxxxxxxx] On Behalf Of Peter Todd
> Sent: April 23, 2006 10:00 AM
> To: Sandor Ajzenstat; ARG List
> Subject: Re: ARG: PIC A/D conversion jitter
>
> A! Sent via the Art & Robotics Group mailing list:
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>
> On Fri, Apr 21, 2006 at 01:23:03PM -0400, Sandor Ajzenstat wrote:
>
> I have a piece using a pic18f242 and a slider pot (PP1045SB-ND on
> digikey) I'm not %100 sure of the composition, but I'm led to
> believe it's better than a simple carbon composition. In any
> case I found that after taking only the top 8-bits sampled
> about 9768 times a second yielded a noise free signal. The
> bottom bit did exhibit some random noise, which I used to
> reseed the LFSR shift register. In this application any
> change in the value of the slider would cause a write to the
> EEPROM, so I further guarded against noise with a simple "do
> nothing until position has changed more than x" filter.
>
> Electrically the pot is connected to big Gnd and Vcc traces
> on the PCB that go directly to the PIC and come directly from
> the main power supply filter caps. The PIC has ceramic 1uF
> and 0.1uF filter caps on it.
>
> I'd try looking at the actual electrical signal going to your
> PIC with an osciloscope set on AC. It'd be interesting to
> know what frequency the variations in digital value occur at,
> or for that matter, if they are periodic at all. Might yield
> some insight into where that signal is coming from.
>
> Does the noise go away if you connect AN0 directly to ground?
>
> > Dear ARG list,
> >
> >
> >
> > I have a question regarding the PIC18F452 and A/D jitter.
> Any suggestions you can make would be greatly appreciated.
> >
> >
> >
> > I am using a 1K 2Watt carbon potentiometer. The pot has
> terminals 1 & 3 (terminals at either end of the resistive
> element) connected to +5V and Ground, which are common to the
> PIC's VDD and VSS. The potentiometer wiper terminal is wired
> to the PIC analog input AN0.
> >
> >
> >
> > I am finding that if I make a number of readings with no
> changes to the potentiometer I get variations in the digital
> value determined by the A/D. Depending on the pot setting
> this can affect the lowest 4 bits of conversion, for example:
> for a specific pot setting I get a fluctuation between 0x77 and 0x78.
> >
> >
> >
> > Issues of offset error and calibration are not a problem
> for me, but my application requires a consistent unchanging
> digital conversion for a specific potentiometer setting. I
> only need 8 significant bits, so I can loose the two lsb bits
> from the 10 bit conversion, but even so I find I get
> variations in digital conversion when the pot is not adjusted.
> >
> >
> >
> > The problem seems to become worse when I touch the
> potentiometer. It has been explained to me this suggests the
> pot might be acting as an antenna. I have tried grounding
> the pot chassis, but this has not helped.
> >
> >
> >
> > I have checked all the eratta sheets for this PIC.
> >
> >
> >
> > Things I have tried which have not affected this issue:
> >
> >
> >
> > (1) use of VREF+ and VREF- instead of VSS and VDD
> for the reference voltage
> >
> > (2) grounding the potentiometer chassis
> >
> > (3) various kinds of pi filter on the pot wiper
> terminal output
> >
> > (4) 10 uF cap across pot terminals 1 and 3
> >
> >
> >
> > Things I have not yet tried:
> >
> >
> >
> > (1) Replace pot with one that has a cermet resistive element
> >
> > (2) Replace PIC with 18F4520
> >
> >
> >
> > Again, thank you for any help or ideas you may have. I
> appreciate your time in this regard.
> >
> >
> >
> > Sincerely,
> >
> > Sandor Ajzenstat
> >
> >
> >
> > p.s. Specific note to Bob B: I've considered your
> suggestion, but I'm not sure how it will help. I guess I
> didn't make it clear at the time that the pot terminals 1 & 3
> are at +5 and GND. Take care, S.
> >
> >
> >
> >
> >
> >
>
> --
> pete@xxxxxxxxxxxx http://www.petertodd.ca
>
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