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Re: PIC A/D conversion jitter

From: Jeff Mann   jeffjeffmann.com
Date: Sat, 22 Apr 2006 19:54:08 -0700

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hi sandor (et al) -

i've battled the "fluttering sensors" problem a few times...

the "proper" way to solve it is to use an analog filter, to filter out any signals above 30Hz or so. this can be anything from a simple r-c filter to an op-amp based one (see microchip's "filterlab" stuff for pointers on how to design that).

however, i've found that a simple averaging technique in software works wonders. for my own pic sensor board, i take 128 readings (over a period of maybe 30 milliseconds?), accumulate them into a 16-bit variable, and then right-shift to get an 8-bit result. not perfect, but a really big improvement.

other analog things to consider - you are correct in using VSS and VDD as the reference voltage - just make sure to feed the +5 and ground to the pot from very close to the PIC's power pins, rather than from the power supply terminals (that way any modulations in either will be shared, and should cancel out). use shielded cabling. make sure the PIC has a good bypass capacitor (eg. 0.1uF ceramic) on its power pins. you could also try a 0.1uF decoupling capacitor on the analog input pin (at the chip, not on the pot), but i haven't found that to be particularly useful when using a low-impedance sensor like a 1k pot.

replacing the pot or replacing the PIC probably won't help. if the above doesn't work, let me know - i have some more ideas where that came from...

cu later <jeff




Sandor Ajzenstat wrote: 
Dear ARG list,



I have a question regarding the PIC18F452 and A/D jitter. Any suggestions you can make would be greatly appreciated.



I am using a 1K 2Watt carbon potentiometer. The pot has terminals 1 & 3 (terminals at either end of the resistive element) connected to +5V and Ground, which are common to the PIC's VDD and VSS. The potentiometer wiper terminal is wired to the PIC analog input AN0.



I am finding that if I make a number of readings with no changes to the potentiometer I get variations in the digital value determined by the A/D. Depending on the pot setting this can affect the lowest 4 bits of conversion, for example: for a specific pot setting I get a fluctuation between 0x77 and 0x78.



Issues of offset error and calibration are not a problem for me, but my application requires a consistent unchanging digital conversion for a specific potentiometer setting. I only need 8 significant bits, so I can loose the two lsb bits from the 10 bit conversion, but even so I find I get variations in digital conversion when the pot is not adjusted.



The problem seems to become worse when I touch the potentiometer. It has been explained to me this suggests the pot might be acting as an antenna. I have tried grounding the pot chassis, but this has not helped.



I have checked all the eratta sheets for this PIC.



Things I have tried which have not affected this issue:



(1) use of VREF+ and VREF- instead of VSS and VDD for the reference voltage

(2)        grounding the potentiometer chassis

(3)        various kinds of pi filter on the pot wiper terminal output

(4)        10 uF cap across pot terminals 1 and 3



Things I have not yet tried:



(1)        Replace pot with one that has a cermet resistive element

(2) Replace PIC with 18F4520



Again, thank you for any help or ideas you may have. I appreciate your time in this regard.



Sincerely,

Sandor Ajzenstat



p.s. Specific note to Bob B: I've considered your suggestion, but I'm not sure how it will help. I guess I didn't make it clear at the time that the pot terminals 1 & 3 are at +5 and GND. Take care, S.








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