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AID: Decoupling at each Vdd/Vss pair

From: Steven Wood   stevenikoro.com
Date: Tue, 16 Nov 2004 08:17:09 -0800

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Just read on a Microchip forum post where Richard Collett suggests,

"... if the IC has multiple pairs of Pwr/Gnd pins, there should be a
decoupling cap on *each* pair!"

Ought we adjust the mainboard schematic to suit and avoid potentially
irksome glitches in the future?

Steven

 =========================================
 Steven Wood
 IKORO Digital Inc        http://ikoro.com
 =========================================

Reference:
http://forum.microchip.com/tm.asp?m=54561


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